overview the kinetis mcu portfolio consists of multiple pin-, peripheral and software-compatible mcu families based on the arm ? cortex?-m4 core. kinetis mcu families are built from innovative 90 nm thin-film storage (tfs) flash technology with unique flexmemory (eeprom) capability and offer industry- leading low power and mixed signal analog integration. the k50 mcu family provides designers with an analog measurement engine consisting of integrated operational and transimpedance amplifiers as well as high-resolution adc and dac modules. the family also features ieee ? 1588 ethernet and hardware encryption, full-speed usb 2.0 on-the-go with device charger detect capability and a flexible low-power segment lcd controller with support for up to 320 segments. devices start from 128 kb of flash in 64 qfn packages extending up to 512 kb in a 144 mapbga package. 32-bit mcus integrated measurement engine, ethernet and lcd kinetis k50 family target applications ? low-power portable medical devices ? clinical and lab equipment ? test/measurement equipment ? instrumentation applications ? monitor and telehealth applications kinetis k50 family standard optional kinetis k50 family cyclic redundancy check (crc) random number generator cryptographic acceleration unit (cau) xtrinsic low-power touch-sensing interface segment lcd controller timers system memories communication interfaces hmi clocks internal and external watchdogs memory protection unit (mpu) dma low-leakage wake-up unit phase-locked loop frequency- locked loop low/high- frequency oscillators internal reference clocks carrier modulator transmitter periodic interrupt timer independent real-time clock (irtc) security and integrity analog core interrupt controller debug interfaces dsp arm ? cortex?-m4 72/100 mhz 16 -bit adc pga analog comparator 6-bit dac triamp 12-bit dac voltage reference opamp flextimer programmable delay block low-power timer ieee ? 1 58 8 timer program flash (128 to 512 kb) flexmemory ( 32 to 256 kb) (2 to 4 kb ee) serial programming interface (ezport) sram (32 to 128 kb) external bus interface (flexbus) gpio i 2 c uart (iso 7816) spi ieee 1588 ethernet mac i 2 s secure digital host controller (sdhc) usb otg (ls/fs) usb charger detect (dcd) usb voltage regulator
k50 family options benefits features ? express logic threadx ? segger embos ? freertos ? green hills -velosity ? mocana (security) ? full arm ecosystem ? reduces core interruption, increasing performance ? design flexibility and system cost reduction ? increases system safety by restricting access to key memory locations ? provides scalability needed for key digital power and motor control applications one-stop enablement offering: mcu + ide + rtos freescale tower system hardware development environment: ? twr-k53n512-kit ($179) includes twr-ser, twr-elev and twr-k53n512 modules ? twr-k53n512 ($109) includes twr-k53n512 and twrpi-slcd daughter card ? integrated development environments eclipse-based codewarrior ide and processor expert iar embedded workbench keil mdk codesourcery sourcery g++ (gnu) ? portable medical applications demo software: ekg, pulse oximeter, blood pressure monitor, spirometer ? math, dsp and encryption libraries ? motor control libraries ? complimentary bootloaders (usb, ethernet, rf, serial) ? complimentary freescale embedded gui ? complimentary freescale mqx? rtos ? cost-effective nano? ssl/nano? ssh for freescale mqx rtos ? micrium uc/os-iii freescale, the freescale logo, codewarrior and the energy efficient solutions logo and processor expert are trademarks of freescale semiconductor, inc., reg. u.s. pat. & tm. off. xtrinsic is a trademark of freescale semiconductor, inc. all other product or service names are the property of their respective owners. arm is the registered trademark of arm limited. arm cortex-m4 is the trademark of arm limited. ? 2011, 2012 freescale semiconductor, inc. kntsk50fmlyfs rev 4 for current information about kinetis products and documentation, please visit freescale.com/kinetis yy = package designator part number cpu (mhz) memory feature options packages flash (kb) flexmemory(kb) sram(kb) eeprom/ flexram (kb) triamp opamp dac ethernet lcd adc 64 lqfp (10 x 10 mm) lh 80 lqfp (12 x 12 mm) lk 100 lqfp (14 x 14 mm) ll 121 bga (8 x 8 mm) mc 144 lqfp (20 x 20 mm) lq 144 bga (13 x 13 mm) md MK50DX128CYY7 72 128 32 32 2 mk51dx128cyy7 72 128 32 32 2 mk50dx256cyy7 72 256 32 64 2 mk51dx256cyy7 72 256 32 64 2 mk51dn256zcyy10 100 256 - 64 mk50dx256zcyy10 100 256 256 64 4 mk51dx256zcyy10 100 256 256 64 4 mk53dx256zcyy10 100 256 256 128 4 mk50dn512zcyy10 100 512 - 128 mk51dn512zcyy10 100 512 - 128 mk52dn512zcyy10 100 512 - 128 mk53dn512zcyy10 100 512 - 128 ? arm ? cortex?-m4 core with dsp instruction support ? up to 16-channel dma and crossbar switch ? up to 100 mhz core supporting a broad range of processing bandwidth needs ? peripheral and memory servicing with reduced cpu loading. concurrent multi-master bus accesses for increased bus bandwidth ? up to 2 x 16-bit adc with pga ? up to 2 x 12-bit dac ? programmable delay block ? operational and transimpedance amplifers ? voltage reference (vref) ? high-resolution and high-accuracy adc provides accurate signal acquisition ? digital-to-analog converter with clock gating optimized for low-power usage ? pdb precisely triggers adc and dac blocks to complete sensor biasing and measurement (i.e. glucometry strips) ? opamps allow signal fltering and amplifcation, triamps are optimized for converting current inputs into voltages that can be read by the adc ? vref allows enhanced accuracy by supplying analog peripherals with fxed reference ? ieee ? 1588 ethernet mac with hardware time stamping ? hardware encryption coprocessor ? precision clock synchronization for real-time networked industrial automation and control ? secure data transfer and storage. faster than software implementations and with minimal cpu loading. supports a wide variety of algorithms ? usb on-the-go (full-speed) with device charger detect ? optimized charging current/time for portable usb devices enabling longer battery life usb low-voltage regulator supplies up to 120 ma off chip at 3.3 v to power external components from 5 v input ? flexible, low-power lcd controller with support for up to 320 segments (40 x 8 or 44 x 4) ? lcd blink mode enables low average power while remaining in low-power mode ? segment fail detect guards against erroneous readouts and reduces lcd test costs ? frontplane/backplane reassignment provides pin-out fexibility easing pcb design and allows lcd confguration changes via frmware with no hardware re-work ? supports multiple 3 v and 5 v lcd panel sizes with fewer segments (pins) than competitive controllers and no external components ? unused lcd pins can be confgured as other gpio functions ? flexbus external bus interface and secure digital host controller ? enables the connection of external memories and peripherals (e.g., graphics displays) ? connection to sd, sdio, mmc or ce-ata cards for in-application software upgrades, fle systems or adding wi-fi ? or bluetooth ? support ? 128C512 kb fash. up to 128 kb of sram ? 32C256 kb flexmemory ? high reliability, fast access program memory with 4-level security protection ? independent fash banks allow concurrent code execution and frmware updating ? flexmemory provides 2C4 kb of user-segmentable byte write/erase eeprom in addition, flex nvm from 32C256 kb for extra program code, data or eeprom backup
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